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ISL8394
Data Sheet June 2003 FN6038.1
Low-Voltage, Single and Dual Supply, Quad SPDT, Analog Switches
The Intersil ISL8394 device is a precision, quad SPDT analog switches designed to operate from a single +2V to +12V supply or from a 2V to 6V supply. Targeted applications include battery powered equipment that benefit from the devices' low power consumption (5W), low leakage currents (2.5nA max), and fast switching speeds (tON = 50ns, tOFF = 30ns). A 4 maximum RON flatness ensures signal fidelity, while channel to channel mismatch is guaranteed to be less than 2. The ISL8394 is a quad single-pole/double-throw (SPDT) device and can be used as a quad SPDT, a quad 2:1 multiplexer, a single 4:1 multiplexer, or a dual 2-channel differential multiplexer. Table 1 summarizes the performance of this family. For higher performance, pin compatible versions, see the ISL43240 data sheet.
TABLE 1. FEATURES AT A GLANCE ISL8394 Configuration 5V RON 5V tON/tOFF 5V RON 5V tON/tOFF 3V RON 3V tON/tOFF Package Quad SPDT 17 50ns/30ns 25 80ns/40ns 75 150ns/75ns 20 Ld SOIC
Features
* Drop-in Replacement for MAX394 * Four Separately Controlled SPDT Switches * ON Resistance (RON) . . . . . . . . . . . 17 (Typ) 35 (Max) * RON Matching Between Channels. . . . . . . . . . . . . . . . . . <1 * Low Charge Injection . . . . . . . . . . . . . . . . . . . . . 10pC (Max) * Low Power Consumption (PD) . . . . . . . . . . . . . . . . . . . .<5W * Low Leakage Current (Max at 85oC) . . . . . . . . . . . . 2.5nA * Fast Switching Action - tON . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50ns - tOFF . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30ns * Guaranteed Break-Before-Make * Minimum 2000V ESD Protection per Method 3015.7 * TTL, CMOS Compatible
Applications
* Battery Powered, Handheld, and Portable Equipment - Barcode Scanners - Laptops, Notebooks, Palmtops * Communications Systems - Radios - Base Stations - RF "Tee" Switches * Test Equipment - Ultrasound - CAT/PET SCAN - Electrocardiograph * Audio and Video Switching
Ordering Information
PART NO. (BRAND) ISL8394IB ISL8394IB-T TEMP. RANGE (oC) -40 to 85 -40 to 85 PACKAGE 20 Ld SOIC PKG. DWG. # M20.3
20 Ld SOIC M20.3 Tape and Reel
* General Purpose Circuits - +3V/+5V DACs and ADCs - Digital Filters - Operational Amplifier Gain Switching Networks - High Frequency Analog Switching - High Speed Multiplexing
Related Literature
* Technical Brief TB363 "Guidelines for Handling and Processing Moisture Sensitive Surface Mount Devices (SMDs)" * Application Note AN557 "Recommended Test Procedures for Analog Switches"
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CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 321-724-7143 | Intersil (and design) is a registered trademark of Intersil Americas Inc. Copyright (c) Intersil Americas Inc. 2003. All Rights Reserved. All other trademarks mentioned are the property of their respective owners.
ISL8394 Pinout
(Note 1) ISL8394 (SOIC) TOP VIEW
IN1 1 NO1 2 COM1 3 NC1 4 V- 5 GND 6 NC2 7 COM2 8 NO2 9 IN2 10 20 IN4 19 NO4 18 COM4 17 NC4 16 V+ 15 N.C. 14 NC3 13 COM3 12 NO3 11 IN3
Pin Descriptions
PIN V+ VGND IN COM NO NC N.C. FUNCTION Positive Power Supply Input Negative Power Supply Input. Connect to GND for Single Supply Configurations. Ground Connection Digital Control Input Analog Switch Common Pin Analog Switch Normally Open Pin Analog Switch Normally Closed Pin No Internal Connection
NOTE: 1. Switches Shown for Logic "0" Input.
Truth Table
LOGIC 0 1 NOTE: ISL8394 NO SW OFF ON ISL8394 NC SW ON OFF
Logic "0" 0.8V. Logic "1" 2.4V.
2
ISL8394
Absolute Maximum Ratings
V+ to V- . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 to15V V+ to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 to15V V- to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -15 to 0.3V All Other Pins (Note 2) . . . . . . . . . . . . . ((V-) - 0.3V) to ((V+) + 0.3V) Continuous Current (Any Terminal) . . . . . . . . . . . . . . . . . . . . . 30mA Peak Current, IN, NO, NC, or COM (Pulsed 1ms, 10% Duty Cycle, Max) . . . . . . . . . . . . . . . . . 100mA ESD Rating (Per MIL-STD-883 Method 3015). . . . . . . . . . . . . .>2kV
Thermal Information
Thermal Resistance (Typical, Note 3) JA (oC/W) 20 Ld SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . 95 Maximum Junction Temperature (Plastic Package) . . . . . . . 150oC Moisture Sensitivity (See Technical Brief TB363) SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Level 1 Maximum Storage Temperature Range. . . . . . . . . . . . -65oC to 150oC Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . 300oC (Lead Tips Only)
Operating Conditions
Temperature Range ISL8394IX . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -40oC to 85oC
CAUTION: Stresses above those listed in "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTES: 2. Signals on NC, NO, COM, or IN exceeding V+ or V- are clamped by internal diodes. Limit forward diode current to maximum current ratings. 3. JA is measured with the component mounted on a low effective thermal conductivity test board in free air. See Tech Brief TB379 for details.
Electrical Specifications: 5V Supply
Test Conditions: VSUPPLY = 4.5V to 5.5V, GND = 0V, VINH = 2.4V, VINL = 0.8V (Note 4), Unless Otherwise Specified TEST CONDITIONS TEMP (oC) (NOTE 5) MIN TYP (NOTE 5) MAX UNITS
PARAMETER ANALOG SWITCH CHARACTERISTICS Analog Signal Range, VANALOG ON Resistance, RON
Full VS = 4.5V, ICOM = 10mA, VNO or VNC = 3.5V, (See Figure 5) VS = 5V, ICOM = 10mA, VNO or VNC = 3V 25 Full 25 Full VS = 5V, ICOM = 10mA, VNO or VNC = 3V, 0V, (Note 7) VS = 5.5V, VCOM = 4.5V, VNO or VNC = +4.5V, (Note 6) VS = 5.5V, VCOM = VNO or VNC = 4.5V, (Note 6) 25 Full 25 Full 25 Full
V-0.2 -2.5 -0.4 -5
17 0.5 -
V+ 35 45 2 4 4 6 0.2 2.5 0.4 5
V nA nA nA nA
RON Matching Between Channels, RON RON Flatness, RFLAT(ON)
NO or NC OFF Leakage Current, INO(OFF) or INC(OFF) COM ON Leakage Current, ICOM(ON)
DIGITAL INPUT CHARACTERISTICS Input Voltage High, VINH Input Voltage Low, VINL Input Current, IINH, IINL DYNAMIC CHARACTERISTICS Turn-ON Time, tON VS = 4.5V, VNO or VNC = 3V, RL = 300, CL = 35pF, VIN = 0 to 3V, (See Figure 1) VS = 4.5V, VNO or VNC = 3V, RL = 300, CL = 35pF, VIN = 0 to 3V, (See Figure 1) VS = 5.5V, VNO or VNC = 3V, RL = 300, CL = 35pF, VIN = 0 to 3V, (See Figure 3) CL = 1.0nF, VG = 0V, RG = 0, (See Figure 2) f = 1MHz, VNO or VNC = VCOM = 0V, (See Figure 7) 25 Full 25 Full 25 25 25 2 50 30 10 5 12 130 175 75 100 10 ns ns ns ns ns pC pF VS = 5.5V, VIN = 0V or V+ Full Full Full 2.4 -1 0.8 1 V V A
Turn-OFF Time, tOFF
Break-Before-Make Time Delay, tD Charge Injection, Q NO OFF Capacitance, COFF
3
ISL8394
Electrical Specifications: 5V Supply
Test Conditions: VSUPPLY = 4.5V to 5.5V, GND = 0V, VINH = 2.4V, VINL = 0.8V (Note 4), Unless Otherwise Specified (Continued) TEST CONDITIONS f = 1MHz, VNO or VNC = VCOM = 0V, (See Figure 7) f = 1MHz, VNO or VNC = VCOM = 0V, (See Figure 7) RL = 50, CL = 15pF, f = 1MHz, VNO or VNC = 1VRMS, (See Figures 4 and 6) TEMP (oC) 25 25 25 25 (NOTE 5) MIN TYP 12 39 71 -92 (NOTE 5) MAX UNITS pF pF dB dB
PARAMETER NC OFF Capacitance, COFF COM ON Capacitance, CCOM(ON) OFF Isolation Crosstalk, (Note 8)
POWER SUPPLY CHARACTERISTICS Power Supply Range Positive Supply Current, I+ VS = 5.5V, VIN = 0V or V+, Switch On or Off Full 25 Full Negative Supply Current, I25 Full NOTES: 4. VIN = Input voltage to perform proper function. 5. The algebraic convention, whereby the most negative value is a minimum and the most positive a maximum, is used in this data sheet. 6. Leakage parameter is 100% tested at high temp, and guaranteed by correlation at 25oC. 7. Flatness is defined as the difference between maximum and minimum value of on-resistance over the specified analog signal range. Flatness specifications are guaranteed only with specified voltages. 8. Between any two switches. 2.0 -1 -1 -1 -1 0.01 0.01 6 1 1 1 1 V A A A A
Electrical Specifications: 5V Supply
Test Conditions: V+ = +4.5V to +5.5V, V- = GND = 0V, VINH = 2.4V, VINL = 0.8V (Note 4), Unless Otherwise Specified TEST CONDITIONS TEMP (oC) MIN (NOTE 5) TYP MAX (NOTE 5) UNITS
PARAMETER ANALOG SWITCH CHARACTERISTICS Analog Signal Range, VANALOG ON Resistance, RON
Full V+ = 5V, ICOM = 1.0mA, VNO or VNC = 3.5V, (See Figure 5) V+ = 5V, ICOM = 1.0mA, VNO or VNC = 3V 25 Full 25 Full V+ = 5V, ICOM = 1.0mA, VNO or VNC = 1V, 2V, 3V, (Note 7) V+ = 5.5V, VCOM = 1V, 4.5V, VNO or VNC = 4.5V, 1V, (Note 6) V+ = 5.5V, VCOM = VNO or VNC = 4.5V, (Note 6) 25 Full 25 Full 25 Full
0 -0.2 -2.5 -0.4 -5
25 0.5 -
V+ 65 75 2 4 6 8 0.2 2.5 0.4 5
V nA nA nA nA
RON Matching Between Channels, RON RON Flatness, RFLAT(ON)
NO or NC OFF Leakage Current, INO(OFF) or INC(OFF) COM ON Leakage Current, ICOM(ON)
DIGITAL INPUT CHARACTERISTICS Input Voltage High, VINH Input Voltage Low, VINL Input Current, IINH, IINL DYNAMIC CHARACTERISTICS Turn-ON Time, tON V+ = 4.5V, VNO or VNC = 3V, RL = 300, CL = 35pF, VIN = 0 to 3V, (See Figure 1) 25 Full 80 250 300 ns ns V+ = 5.5V, VIN = 0V or V+ Full Full Full 2.4 -1 0.8 1 V V A
4
ISL8394
Electrical Specifications: 5V Supply
Test Conditions: V+ = +4.5V to +5.5V, V- = GND = 0V, VINH = 2.4V, VINL = 0.8V (Note 4), Unless Otherwise Specified (Continued) TEST CONDITIONS V+ = 4.5V, VNO or VNC = 3V, RL = 300, CL = 35pF, VIN = 0 to 3V, (See Figure 1) V+ = 5.5V, VNO or VNC = 3V, RL = 300, CL = 35pF, VIN = 0 to 3V, (See Figure 3) CL = 1.0nF, VG = 0V, RG = 0, (See Figure 2) TEMP (oC) 25 Full 25 25 MIN (NOTE 5) 5 TYP 40 20 3 MAX (NOTE 5) UNITS 125 175 5 ns ns ns pC
PARAMETER Turn-OFF Time, tOFF
Break-Before-Make Time Delay, tD Charge Injection, Q
POWER SUPPLY CHARACTERISTICS Power Supply Range Positive Supply Current, I+ V+ = 5.5V, V- = 0V, VIN = 0V or V+, Switch On or Off Full 25 Full Negative Supply Current, I25 Full 2 -1 -1 -1 -1 0.01 0.01 12 1 1 1 1 V A A A A
Electrical Specifications: 3.3V Supply
Test Conditions: V+ = +3.0V to +3.6V, V- = GND = 0V, VINH = 2.4V, VINL = 0.8V (Note 4), Unless Otherwise Specified TEST CONDITIONS TEMP (oC) MIN (NOTE 5) TYP MAX (NOTE 5) UNITS
PARAMETER ANALOG SWITCH CHARACTERISTICS Analog Signal Range, VANALOG ON Resistance, RON
Full V+ = 3V, ICOM = 1.0mA, VNO or VNC = 1.5V 25 Full
0 -0.2 -2.5 -0.4 -5
75 -
V+ 185 250 0.2 2.5 0.4 5
V nA nA nA nA
NO or NC OFF Leakage Current, INO(OFF) or INC(OFF) COM ON Leakage Current, ICOM(ON)
V+ = 3.6V, VCOM = 0V, 4.5V, VNO or VNC = 3V, 1V, (Note 6) V+ = 3.6V, VCOM = VNO or VNC = 3V, (Note 6)
25 Full 25 Full
DIGITAL INPUT CHARACTERISTICS Input Voltage High, VINH Input Voltage Low, VINL Input Current, IINH, IINL DYNAMIC CHARACTERISTICS Turn-ON Time, tON Turn-OFF Time, tOFF Break-Before-Make Time Delay, tD Charge Injection, Q V+ = 3.0V, VNO or VNC = 1.5V, RL = 300, CL = 35pF, VIN = 0 to 3V, (See Figure 1) V+ = 3.0V, VNO or VNC = 1.5V, RL = 300, CL = 35pF, VIN = 0 to 3V, (See Figure 1) V+ = 3.6V, VNO or VNC = 1.5V, RL = 300, CL = 35pF, VIN = 0 to 3V, (See Figure 3) CL = 1.0nF, VG = 0V, RG = 0, (See Figure 2) 25 25 25 25 5 150 75 20 1 400 150 5 ns ns ns pC V+ = 3.6V, VIN = 0V or V+ Full Full Full 2.4 -1 0.8 1 V V A
POWER SUPPLY CHARACTERISTICS Power Supply Range Positive Supply Current, I+ V+ = 3.6V, V- = 0V, VIN = 0V or V+, Switch On or Off Full 25 Full Negative Supply Current, I25 Full 2 -1 -1 -1 -1 0.01 0.01 12 1 1 1 1 V A A A A
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ISL8394 Test Circuits and Waveforms
3V LOGIC INPUT 50% 0V tON tON VNO SWITCH OUTPUT VNO VNC tOFF VOUT 75% 25% tOFF 75% 25% LOGIC INPUT VC GND SWITCH INPUTS tr < 20ns tf < 20ns V+ C VNC C NC NO IN RL 300 CL 35pF VOUT C
COM
Logic input waveform is inverted for switches that have the opposite logic sense.
Repeat test for all switches. CL includes fixture and stray capacitance. RL -----------------------------V OUT = V (NO or NC) R + R
L ( ON )
FIGURE 1A. MEASUREMENT POINTS FIGURE 1. SWITCHING TIMES
FIGURE 1B. TEST CIRCUIT
V+
C
SWITCH OUTPUT VOUT
VOUT RG 3V COM NO OR NC VOUT
LOGIC INPUT
ON OFF
ON 0V VG IN GND CL
Q = VOUT x CL
C V-
LOGIC INPUT
Logic input waveform is inverted for switches that have the opposite logic sense. FIGURE 2A. MEASUREMENT POINTS
Repeat test for all switches. CL includes fixture and stray capacitance. FIGURE 2B. TEST CIRCUIT
FIGURE 2. CHARGE INJECTION
V+ 3V LOGIC INPUT 0V VNX SWITCH OUTPUT VOUT 80% IN 0V tD LOGIC INPUT GND C
NO
C
COM
NC
VOUT RL 300 CL 35pF
Repeat test for all switches. CL includes fixture and stray capacitance. FIGURE 3A. MEASUREMENT POINTS FIGURE 3. BREAK-BEFORE-MAKE TIME FIGURE 3B. TEST CIRCUIT
6
ISL8394 Test Circuits and Waveforms (Continued)
V+ C SIGNAL GENERATOR RON = V1/1mA
NO OR NC NO OR NC
V+ C
VNX IN 0V OR 2.4V 1mA V1 IN 0.8V OR 2.4V
ANALYZER RL
COM
COM
GND
GND
C VV-
C
Repeat test for all switches. FIGURE 4. OFF ISOLATION TEST CIRCUIT
Repeat test for all switches. FIGURE 5. RON TEST CIRCUIT
V+ C V+
SIGNAL GENERATOR
NO1 OR NC1
COM1
50
NO OR NC
IN1 0V or 2.4V IN2 0V OR 2.4V NO CONNECTION IMPEDANCE ANALYZER
COM
IN
0V OR 2.4V
ANALYZER RL
COM2
NO2 or NC2
GND
GND
C V-
V-
FIGURE 6. CROSSTALK TEST CIRCUIT
FIGURE 7. CAPACITANCE TEST CIRCUIT
Detailed Description
The ISL8394 quad analog switches offer precise switching capability from a bipolar 2V to 6V or a single 2V to 12V supply with low on-resistance (17) and high speed operation (tON = 50ns, tOFF = 30ns). The devices are especially well suited to portable battery powered equipment thanks to the low operating supply voltage (2V), low power consumption (5W), low leakage currents (2.5nA max). High frequency applications also benefit from the wide bandwidth, and the very high off isolation and crosstalk rejection.
Figure 8). To prevent forward biasing these diodes, V+ and V- must be applied before any input signals, and input signal voltages must remain between V+ and V-. If these conditions cannot be guaranteed, then one of the following two protection methods should be employed. Logic inputs can easily be protected by adding a 1k resistor in series with the input (see Figure 8). The resistor limits the input current below the threshold that produces permanent damage, and the sub-microamp input current produces an insignificant voltage drop during normal operation. Adding a series resistor to the switch input defeats the purpose of using a low RON switch, so two small signal diodes can be added in series with the supply pins to provide overvoltage protection for all pins (see Figure 8). These additional diodes limit the analog signal from 1V below V+ to
Supply Sequencing And Overvoltage Protection
With any CMOS device, proper power supply sequencing is required to protect the device from excessive input currents which might permanently damage the IC. All I/O pins contain ESD protection diodes from the pin to V+ and to V- (see
7
ISL8394
1V above V-. The low leakage current performance is unaffected by this approach, but the switch resistance may increase, especially at low supply voltages.
High-Frequency Performance
In 50 systems, signal response is reasonably flat even past 200MHz (see Figure 15), with a small signal -3dB bandwidth in excess of 300MHz, and a large signal bandwidth exceeding 300MHz. An off switch acts like a capacitor and passes higher frequencies with less attenuation, resulting in signal feedthrough from a switch's input to its output. Off Isolation is the resistance to this feedthrough, while Crosstalk indicates the amount of feedthrough from one switch to another. Figure 16 details the high Off Isolation and Crosstalk rejection provided by this switch. At 10MHz, off isolation is about 50dB in 50 systems, decreasing approximately 20dB per decade as frequency increases. Higher load impedances decrease Off Isolation and Crosstalk rejection due to the voltage divider action of the switch OFF impedance and the load impedance.
OPTIONAL PROTECTION DIODE V+ OPTIONAL PROTECTION RESISTOR INX VNO or NC VCOM
VOPTIONAL PROTECTION DIODE
FIGURE 8. OVERVOLTAGE PROTECTION
Leakage Considerations Power-Supply Considerations
The ISL8394 construction is typical of most CMOS analog switches, in that they have three supply pins: V+, V-, and GND. V+ and V- drive the internal CMOS switches and set their analog voltage limits, so there are no connections between the analog signal path and GND. Unlike switches with a 13V maximum supply voltage, the ISL8394 15V maximum supply voltage provides plenty of room for the 10% tolerance of 12V supplies (6V or 12V single supply), as well as room for overshoot and noise spikes. This family of switches performs equally well when operated with bipolar or single voltage supplies.The minimum recommended supply voltage is 2V or 2V. It is important to note that the input signal range, switching times, and onresistance degrade at lower supply voltages. Refer to the electrical specification tables and Typical Performance curves for details. V+ and GND power the internal logic (thus setting the digital switching point) and level shifters. The level shifters convert the logic levels to switched V+ and V- signals to drive the analog switch gate terminals. Reverse ESD protection diodes are internally connected between each analog-signal pin and both V+ and V-. One of these diodes conducts if any analog signal exceeds V+ or V-. Virtually all the analog leakage current comes from the ESD diodes to V+ or V-. Although the ESD diodes on a given signal pin are identical and therefore fairly well balanced, they are reverse biased differently. Each is biased by either V+ or V- and the analog signal. This means their leakages will vary as the signal varies. The difference in the two diode leakages to the V+ and V- pins constitutes the analog-signalpath leakage current. All analog leakage current flows between each pin and one of the supply terminals, not to the other switch terminal. This is why both sides of a given switch can show leakage currents of the same or opposite polarity. There is no connection between the analog signal paths and GND.
Logic-Level Thresholds
V+ and GND power the internal logic stages, so V- has no affect on logic thresholds. This switch family is TTL compatible (0.8V and 2.4V) over a V+ supply range of 2.7V to 10V. At 12V the VIH level is about 2.5V. This is still below the TTL guaranteed high output minimum level of 2.8V, but noise margin is reduced. For best results with a 12V supply, use a logic family that provides a VOH greater than 3V. The digital input stages draw supply current whenever the digital input voltage is not at one of the supply rails. Driving the digital input signals from GND to V+ with a fast transition time minimizes power dissipation.
8
ISL8394 Typical Performance Curves TA = 25oC, Unless Otherwise Specified
25 V- = -5V 20 15 10 RON () 62.5 RON () V- = 0V 50 37.5 25 -40oC 12.5 0 3 4 5 6 7 8 V+ (V) 9 10 11 12 85oC 25oC 85oC 25oC -40oC VCOM = (V+) - 1V ICOM = 1mA 80 70 60 50 40 30 20 60 50 40 30 20 35 30 25 20 15 85oC 25oC -40oC 85oC 25oC -40oC 0 1 2 3 VCOM (V) 4 5 V+ = 5V V- = 0V V+ = 3.3V V- = 0V 85oC 25oC -40oC V+ = 2.7V V- = 0V ICOM = 1mA
FIGURE 9. ON RESISTANCE vs SUPPLY VOLTAGE
FIGURE 10. ON RESISTANCE vs SWITCH VOLTAGE
45 40 35 30 25 20 35 30 RON () 25 20 15 10 25 20 15 10 5 -5 -4 -3 -2 -1 0 VCOM (V) 1 2 3 -40oC 25oC 85oC 85oC ICOM = 1mA 85oC 25oC
VS = 2V
15
10 -40oC VS = 3V Q (pC) 25oC -40oC 5 V+ = 3.3V 0 V+ = 5V VS = 5V -5 VS = 5V
-10 4 5 -5 -2.5 0 VCOM (V) 2.5 5
FIGURE 11. ON RESISTANCE vs SWITCH VOLTAGE
FIGURE 12. CHARGE INJECTION vs SWITCH VOLTAGE
9
ISL8394 Typical Performance Curves TA = 25oC, Unless Otherwise Specified (Continued)
250 200 150 100 50 tON (ns) 0 300 250 200 150 100 50 0 2 3 4 5 6 7 V+ (V) 8 9 10 11 12 -40oC 20 10 -40oC 2 3 4 5 6 7 V+ (V) 8 9 10 11 12 85oC 25oC V- = 0V -40oC 25oC 85oC tOFF (ns) -40oC 25oC 125 V- = -5V VCOM = (V+) - 1V 100 75 50 25 0 50 V- = 0V 40 30 85oC 25oC -40oC 25oC -40oC 25oC 85oC V- = -5V VCOM = (V+) - 1V
FIGURE 13. TURN - ON TIME vs SUPPLY VOLTAGE
NORMALIZED GAIN (dB) VS = 5V 3 GAIN 0 VIN = 5VP-P -3 CROSSTALK (dB) VIN = 0.2VP-P -10
FIGURE 14. TURN - OFF TIME vs SUPPLY VOLTAGE
10 20 30 OFF ISOLATION (dB) 40 50 ISOLATION 60 70 80 CROSSTALK -90 -100 -110 1k 90 100 110 100M 500M
V+ = 3V to 12V or -20 VS = 2V to 5V RL = 50 -30 -40 -50 -60 -70 -80
VIN = 0.2VP-P PHASE VIN = 5VP-P
45 90 135 180
RL = 50 1 10 100 FREQUENCY (MHz) 600 10k 100k 1M 10M
PHASE (DEGREES)
0
FREQUENCY (Hz)
FIGURE 15. FREQUENCY RESPONSE
FIGURE 16. CROSSTALK AND OFF ISOLATION
Die Characteristics
SUBSTRATE POTENTIAL (POWERED UP): GND TRANSISTOR COUNT: ISL8394: 418 PROCESS: Si Gate CMOS
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ISL8394 Small Outline Plastic Packages (SOIC)
N INDEX AREA E -B1 2 3 SEATING PLANE -AD -CA h x 45o H 0.25(0.010) M BM
M20.3 (JEDEC MS-013-AC ISSUE C)
20 LEAD WIDE BODY SMALL OUTLINE PLASTIC PACKAGE INCHES SYMBOL A
L
MILLIMETERS MIN 2.35 0.10 0.35 0.23 12.60 7.40 MAX 2.65 0.30 0.49 0.32 13.00 7.60 NOTES 9 3 4 5 6 7 8o Rev. 1 1/02
MIN 0.0926 0.0040 0.014 0.0091 0.4961 0.2914
MAX 0.1043 0.0118 0.019 0.0125 0.5118 0.2992
A1 B C D E

A1 0.10(0.004) C
e H h L N
0.050 BSC 0.394 0.010 0.016 20 0o 8o 0.419 0.029 0.050
1.27 BSC 10.00 0.25 0.40 20 0o 10.65 0.75 1.27
e
B 0.25(0.010) M C AM BS
NOTES: 1. Symbols are defined in the "MO Series Symbol List" in Section 2.2 of Publication Number 95. 2. Dimensioning and tolerancing per ANSI Y14.5M-1982. 3. Dimension "D" does not include mold flash, protrusions or gate burrs. Mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006 inch) per side. 4. Dimension "E" does not include interlead flash or protrusions. Interlead flash and protrusions shall not exceed 0.25mm (0.010 inch) per side. 5. The chamfer on the body is optional. If it is not present, a visual index feature must be located within the crosshatched area. 6. "L" is the length of terminal for soldering to a substrate. 7. "N" is the number of terminal positions. 8. Terminal numbers are shown for reference only. 9. The lead width "B", as measured 0.36mm (0.014 inch) or greater above the seating plane, shall not exceed a maximum value of 0.61mm (0.024 inch) 10. Controlling dimension: MILLIMETER. Converted inch dimensions are not necessarily exact.
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems. Intersil Corporation's quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
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